A VLSI interval router for high-speed networks

Abstract

In this work, a VLSI wormhole router for scalable high-speed networks including 2-D mesh, nearest-neighbor, and n-cube interconnected networks has been developed and implemented. The router is deadlock-free and guarantees to form the shortest paths. This VLSI router has been implemented and fabricated by using 1.2 /spl mu/ CMOS4S standard cell library consisting of 65,000 gates. The performance of the VLSI router is measured and modeled.