Worst Case Design of Variable-Threshold TRL Circuits

Abstract

Now that standard Transistor Resistor Logic is well understood and widely used, the possibilities for reducing component count by changing the height of the switching threshold, as measured in units of input, are being explored. This paper presents the worst case design formulation, both steady-state and transient, for such variable-threshold circuitry. In addition there is a brief discussion of the logic represented. Numerical results illustrate the logical possibilities and the effect of increasing the threshold on transient behavior.