Identifying homogenous reconfigurable regions in heterogeneous FPGAs for module relocation

Abstract

Relocation of partial bitstreams is in the focus of researchers for many years. Several design flows for module relocations have been proposed in the past. In general, these design flows start with a manual identification of equally sized and structured partially reconfigurable regions. Due to the increasing heterogeneity and complexity of modern FPGAs such manual approaches become impractical. This work presents an automated approach for identifying suitable regions for relocatable modules. The algorithm identifies the optimal resource pattern that fits most often on the FPGA device for a given resource requirement. Compared to standard methods trying to find again a manually specified fixed resource pattern, the usage of resource requirements as a starting point augments the amount of identically structured regions to be found.