Low-noise low-power true logarithmic amplifier for neural recording applications

Z. Derafshi, J. Frounchi
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引用次数: 5

Abstract

A low-power low-noise logarithmic preamplifier for biopotential and neural recording application is presented. The logarithmic amplifier based on a True Logarithmic Amplifier technique which has been simulated in a UMC standard 90-nm 1P9M CMOS process consumes 11µW from a 1.2V power supply. The simulated input referred noise is 6.7µV over 0.1 Hz to 20 kHz.
用于神经记录应用的低噪声低功耗真对数放大器
介绍了一种用于生物电位和神经记录的低功耗低噪声对数前置放大器。基于真对数放大器技术的对数放大器已在UMC标准90 nm 1P9M CMOS工艺中进行了仿真,功耗为11µW,电源为1.2V。模拟输入参考噪声为6.7µV,频率为0.1 Hz ~ 20 kHz。
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