A Low Power Fully Programmable 1MHz Resolution 2.4GHz CMOS PLL Frequency Synthesizer

M. Vamshi Krishna, J. Xie, W. M. Lim, M. Do, K. Yeo, C. Boon
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引用次数: 15

Abstract

This paper presents a low power, high resolution 2.4 GHz CMOS frequency synthesizer for low power wireless LAN applications. The PLL frequency synthesizer consists of a fully programmable frequency divider with a resolution of 1 MHz in the range of 2.4 GHz-2.484 GHz.The measured results showed that the programmable divider consumes 946 uA and Quadrature VCO consumes 1.57 mA and produces output swing of 650-700 mVpp. The complete synthesizer is designed using the Chartered RF 0.18 um process and synthesizer consumes 2.7 mA.
低功耗全可编程1MHz分辨率2.4GHz CMOS锁相环频率合成器
提出了一种低功耗、高分辨率的2.4 GHz CMOS频率合成器,适用于低功耗无线局域网。锁相环频率合成器由一个完全可编程分频器组成,在2.4 GHz-2.484 GHz范围内分辨率为1 MHz。测量结果表明,可编程分频器的功耗为946 uA,正交压控振荡器的功耗为1.57 mA,输出摆幅为650-700 mVpp。完整的合成器采用特许RF 0.18 um工艺设计,合成器消耗2.7 mA。
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