A vertical successive-approximation A/D converter architecture for high-speed applications

Abstract

A non-iterative successive approximation quantization technique that provides high throughput rates at low decision cost/bit is described. The MSBs are obtained in a flash-like architecture operating according to a unidirectional successive approximation algorithm. The LSBs are then generated by recycling the built-in flash-type quantizer. Resolution is extendable at minimum speed loss through cascading similar stages operating with pipeline timing.