ISSCC 2019 Session 14 Overview: Machine Learning and Digital LDO Circuits

Abstract

In this session, seven papers highlight developments in machine learning and digital low-dropout (LDO) linear regulators. The papers demonstrate a hybrid digital and mixed-signal computing platform for swarm robotics, bi-directional memory delay lines to perform time-domain MAC operations, hybrid in-/near-memory compute SRAM and resistive RAM for/with resilience techniques. The digital LDO papers present a computational regulation scheme, a sub-nA wide-dynamic-range implementation and a universal modular hybrid LDO in 14nm CMOS. Session Chair: Vivek De Intel, Beaverton, OR Associate Chair: Ping-Ying Wang CMOS-Crystal Technology, Zhubei City, Hsinchu County, Taiwan