A new dynamic scaling FFT processor

Abstract

A new FFT processor with radix-8 algorithm and novel matrix buffer is presented in this paper. About 64 K bit memory can be saved in 8 K-point FFT by new dynamic scaling approach. Moreover, with data scheduling and pre-fetched buffering, single-port memory can be adopted in our FFT processor. A test chip for 8 K mode DVB-T system has been designed and fabricated using 0.18 /spl mu/m CMOS process with core area of 4.84 mm/sup 2/ and consumes only 25.2 mW at 20 MHz.