Memories: Exploiting Them and Developing Them

Abstract

The disciplines of process development, circuit design, and microarchitecture too often remain isolated. This paper on memories explores the benefit of their unification by taking a retrospective look at a L1 cache memory design, a current view of embedded DRAM, and a speculative peek at emerging memories (e.g. MTJ MRAM). In the midst, a novel refresh operation is proposed for DRAM that relies on read and write activity ongoing within a cache to refresh the DRAM.