{"title":"Synchronous Sampling and SNR-Based Gain Control in DS/CDMA Systems","authors":"You-Hsien Lin, Shih-Lin Lo, Wei-Chi Lai, Ta-Yang Juan, Terng-Yin Hsu","doi":"10.1109/VDAT.2007.373229","DOIUrl":null,"url":null,"abstract":"Timing synchronization is an important component in a receiver designed to recover data form sampling digital waveform. A synchronous sampling recovery with dual correlator differential (DCD) based acquisition with effects of auto-gain controller (AGC) is proposed to achieve fast timing acquisition for direct sequence / code division multiple access (DS/CDMA) system over frequency-selective fading channel in this paper. It measures both received DCD difference power to determine the good sampling phase from an all-digital phase interpolator based multiphase generator. This solution can tolerate + 50ppm system clock offset (SCO) under frequency-selective fading channel. Hence, we not only to determine the good sampling phase fast, but also to arrive stable variable gain amplifier (VGA) with AGC controller in DS/CDMA system approaches.","PeriodicalId":137915,"journal":{"name":"2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VDAT.2007.373229","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Timing synchronization is an important component in a receiver designed to recover data form sampling digital waveform. A synchronous sampling recovery with dual correlator differential (DCD) based acquisition with effects of auto-gain controller (AGC) is proposed to achieve fast timing acquisition for direct sequence / code division multiple access (DS/CDMA) system over frequency-selective fading channel in this paper. It measures both received DCD difference power to determine the good sampling phase from an all-digital phase interpolator based multiphase generator. This solution can tolerate + 50ppm system clock offset (SCO) under frequency-selective fading channel. Hence, we not only to determine the good sampling phase fast, but also to arrive stable variable gain amplifier (VGA) with AGC controller in DS/CDMA system approaches.