AND/EXOR-based synthesis of testable KFDD-circuits with small depth

H. Hengster, R. Drechsler, B. Becker, Stefan Eckrich, T. Pfeiffer
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引用次数: 11

Abstract

Decision Diagrams are used in design automation for efficient representation of Boolean functions. It is also possible to directly derive circuits from Decision Diagrams. In this paper we present an approach to synthesize circuits from a very general class of Decision Diagrams, the ordered Kronecker Functional Decision Diagrams. These Decision Diagrams make use of Davio decompositions which are based on exclusive-or operations and therefore allow the use of EXOR gates in the synthesized circuits. We investigate area, depth, and testability of these circuits and compare them to circuit designs generated by other synthesis tools. Experimental results show that the presented approach is suitable to overcome the trade-off between depth and testability at the price of reasonable area overhead.
基于AND/ exoro的小深度可测试kfdd电路合成
决策图在设计自动化中用于布尔函数的有效表示。也可以直接从决策图中推导电路。本文提出了一种从一类非常一般的决策图——有序Kronecker泛函决策图合成电路的方法。这些决策图利用基于异或操作的Davio分解,因此允许在合成电路中使用EXOR门。我们研究了这些电路的面积、深度和可测试性,并将它们与其他合成工具生成的电路设计进行了比较。实验结果表明,该方法以合理的面积开销为代价,克服了深度和可测性之间的权衡。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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