Analysis of various delay elements @ 16-nm technology node

Abstract

This paper makes a profound study of seven different non-programmable delay elements. Signals can be delayed by a desired amount by passing it through these delay elements. Maintaining the signal integrity while incorporating certain delay is also a vital role of these delay elements. Performance evaluation of these delay circuits is presented in terms of different design metrics to lay down comparison among these circuits. This work will help design engineers to select appropriate delay elements based upon their specific requirements. Reported results are based on extensive simulations performed on SPICE simulator using predictive technology model (PTM) @ 16-nm technology node.