Scalable one chip design for a multiplex tap with timestamping [QoS validation applications]

Abstract

Precise tracking of delay, delay jitter and packet loss is one of the key issues in validating quality of service (QoS) goals in practice. As VoIP is deployed, low cost solutions are needed to enable a good coverage of hot spots even in the networks of medium sized or small enterprises. This work reports on the development and integration of an appropriate capturing tool in a one chip core.