Feasibility of a digital design flow of an asynchronous BCJR/MAP convolutional channel decoder

Abstract

The current technology in the design of BCJR or MAP decoders utilizes standard electronic design and automation (EDA) tools in the synchronous paradigm. The BCJR/MAP decoder has gained large scale importance in convolutional coding, especially with its importance in turbo codes. This paper examines the feasibility and benefits of an asynchronous design of a BCJR/MAP decoder. A comparison against other gate level decoders is examined and promising results are shown.