{"title":"A synchronous PWM method of parallel AC-DC converters using hybrid-PLL algorithm","authors":"Sungjoon Cho, Kwanghwan Lee, M. Jeong, Jiyoon Yoo","doi":"10.1109/IECON.2011.6119472","DOIUrl":null,"url":null,"abstract":"This paper proposed a synchronous PWM method of parallel AC-DC converters. The parallel AC-DC converters of traction control system for high speed train require accurate PLL (Phase-Locked Logic) method and synchronous PWM algorithm with phase delay control to implement unit power factor and input current harmonic reduction. The phase delay control of parallel converters driven by individual controllers is difficult. The proposed hybrid PLL algorithm detects the input voltage phase angle more accurately and improves the performance of phase delay control. The hybrid PLL algorithm consists of two kinds of method which calculate simultaneously the phase angle of input voltage. The single-phase AC-DC converters are connected in parallel through main transformer. The first PLL algorithm calculates the phase angle of primary input voltage adopting the digital APF (All-Pass Filter) and it has robust characteristics against the disturbance of input signal compared with conventional zero-crossing detection method by hardware circuit. The estimated phase angle of this algorithm is used for unit power factor control and instantaneous input current control. The second PLL algorithm generates the common reference signal for synchronous PWM by measuring the amplitude of input voltage at the near zero-crossing point. This paper describes the implementation of hybrid PLL algorithm adopting two different kinds of PLL method in detail. The feasibility of this algorithm is proven by experimental study on parallel converters (1.25MW×4) for high speed train.","PeriodicalId":105539,"journal":{"name":"IECON 2011 - 37th Annual Conference of the IEEE Industrial Electronics Society","volume":"54 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IECON 2011 - 37th Annual Conference of the IEEE Industrial Electronics Society","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IECON.2011.6119472","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper proposed a synchronous PWM method of parallel AC-DC converters. The parallel AC-DC converters of traction control system for high speed train require accurate PLL (Phase-Locked Logic) method and synchronous PWM algorithm with phase delay control to implement unit power factor and input current harmonic reduction. The phase delay control of parallel converters driven by individual controllers is difficult. The proposed hybrid PLL algorithm detects the input voltage phase angle more accurately and improves the performance of phase delay control. The hybrid PLL algorithm consists of two kinds of method which calculate simultaneously the phase angle of input voltage. The single-phase AC-DC converters are connected in parallel through main transformer. The first PLL algorithm calculates the phase angle of primary input voltage adopting the digital APF (All-Pass Filter) and it has robust characteristics against the disturbance of input signal compared with conventional zero-crossing detection method by hardware circuit. The estimated phase angle of this algorithm is used for unit power factor control and instantaneous input current control. The second PLL algorithm generates the common reference signal for synchronous PWM by measuring the amplitude of input voltage at the near zero-crossing point. This paper describes the implementation of hybrid PLL algorithm adopting two different kinds of PLL method in detail. The feasibility of this algorithm is proven by experimental study on parallel converters (1.25MW×4) for high speed train.