Single Op-Amp algorithmic converter and its offset and mismatch compensation

Abstract

This paper studies features and limits of an algorithmic ADC implemented with a single operational amplifier. Since the technique can be profitable when the resolution reaches more than 12-bit compared with SAR algorithm, it is necessary to ensure proper specification of active and passive elements or to compensate for these limits. It is shown that reconfigurability of the architecture allows measuring offset and capacitor mismatch for a background or a foreground calibration.