CMOS photodiode model and HDL implementation

Abstract

With CMOS image sensors scaling down due to the resolution and miniaturization demands, compact models for these devices become essential. A physically based model can be used to optimize the device performance and allow circuit designers to use these sensors in integrated circuits. Among other capacities, this analytical model can be used to predict with high accuracy the best photodiode geometry to achieve the maximum photoresponse while optimizing the total layout area cost.