SIMD-based soft error detection

Abstract

Soft error rates in processors have been increasing with decreasing feature size and larger chips. Software-only solutions have been proposed to deal with this problem, for instance via instruction duplication. However, this leads to significant overheads in performance and energy. This paper proposes a novel approach to instruction duplication, which exploits the redundancy within SIMD instructions. The proposed solution is implemented in the LLVM compiler. Execution of a set of compiled C/C++ benchmarks shows that the SIMD based instruction duplication introduces a 32% performance and an 25% energy overheads, respectively, over the baseline. The performance and energy overheads of the state-of-the-art scalar instruction duplication approach are, on average, 111% and 114%, repsectively.