{"title":"A capacitively coupled chopper instrumentation amplifier with a ±30V common-mode range, 160dB CMRR and 5μV offset","authors":"Qinwen Fan, J. Huijsing, K. Makinwa","doi":"10.1109/ISSCC.2012.6177045","DOIUrl":null,"url":null,"abstract":"This paper describes a capacitively coupled chopper instrumentation amplifier (CCIA) for current-sensing applications. A capacitively driven input chopper enables a ±30V input common-mode (CM) range and an input offset less than 5μV. The CCIA does not draw supply current from its input terminals or require a separate high-voltage (HV) supply; and has a common-mode rejection ratio (CMRR) in excess of 160dB, both of which represent significant improvements on the state-of-the-art [1-3]. Implemented in a HV CMOS 0.7μm technology, the CCIA achieves an NEF of 6.1 (6.5× better than [1-3]), while drawing only 26μA from a 3V supply.","PeriodicalId":255282,"journal":{"name":"2012 IEEE International Solid-State Circuits Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"34","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2012.6177045","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 34
Abstract
This paper describes a capacitively coupled chopper instrumentation amplifier (CCIA) for current-sensing applications. A capacitively driven input chopper enables a ±30V input common-mode (CM) range and an input offset less than 5μV. The CCIA does not draw supply current from its input terminals or require a separate high-voltage (HV) supply; and has a common-mode rejection ratio (CMRR) in excess of 160dB, both of which represent significant improvements on the state-of-the-art [1-3]. Implemented in a HV CMOS 0.7μm technology, the CCIA achieves an NEF of 6.1 (6.5× better than [1-3]), while drawing only 26μA from a 3V supply.