Capacitorless LDO with fast transient response based on a high slew-rate error amplifier

C. Răducan, M. Neag
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引用次数: 9

Abstract

This paper presents a high slew-rate error amplifier (EA) used to implement a capacitorless low-dropout voltage regulator (LDO) with a very fast transient response. The proposed EA improves a recently published OA structure, by employing high-swing input buffers and a local common mode feedback. Thus, the figures-of-merit related to the EA gain-bandwidth and slew-rate are 2.75, respectively 24 times better than for the initial OA. The EA was used to implement a LDO that requires only 1.1uA quiescent current but has an output current capability of 100mA. The high slew-rate of the EA helps this LDO to achieve low overshoot/undershoot (200mV/274mV) in case of a fast (1us) load step of 100mA, while employing only an on-chip load capacitance of 100pF. Compared with similar implementations, the proposed LDO yields same or better transient performance while requiring significantly less quiescent current. Thus its figure of merit results at least three times better than for its counterparts. The line and load regulation are 0.07mV/V, respectively 0.0028mV/mA.
基于高转速误差放大器的快速瞬态响应无电容LDO
本文提出了一种用于实现具有快速瞬态响应的无电容低压差稳压器(LDO)的高转速误差放大器。通过采用高摆幅输入缓冲器和局部共模反馈,提出的EA改进了最近发布的OA结构。因此,与EA增益带宽和慢速率相关的优值为2.75,分别比初始OA好24倍。该EA用于实现仅需要1.1uA静态电流但具有100mA输出电流能力的LDO。EA的高自旋速率有助于该LDO在100mA的快速(1us)负载步进情况下实现低过调/欠调(200mV/274mV),而片上负载电容仅为100pF。与类似的实现相比,所提出的LDO产生相同或更好的瞬态性能,同时需要更少的静态电流。因此,它的绩效数据至少是同类产品的三倍。线路和负载调节分别为0.07mV/V, 0.0028mV/mA。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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