An automated pipeline for continuous integration of FPGA firmware and software for the LHCb Run3 upgrade

Abstract

The readout system for the upcoming Run3 upgrade of the LHCb experiment at CERN is basedaround a common readout board called PCIe40. By reconfiguring the onboard FPGA with dedicated firmware, this common board can be used to serve very different roles within the upgradedLHCb experiment. A continuous integration pipeline was implemented in order to automaticallycross-validate the tight interaction between the different FPGA firmwares and the associated DAQand control software, all being actively developed in parallel. We present challenges and solutionsfor applying this kind of practices, traditionally limited mainly to the field of software engineering,also to hardware-in-the-loop validation of FPGA firmware and SCADA-based control systems.