T. Tanaka, H. Tanikawa, T. Yamaki, Y. Umemoto, A. Kato, Y. Shinagawa, M. Hiraki
{"title":"A 512 kB MONOS type flash memory module embedded in a microcontroller","authors":"T. Tanaka, H. Tanikawa, T. Yamaki, Y. Umemoto, A. Kato, Y. Shinagawa, M. Hiraki","doi":"10.1109/VLSIC.2003.1221205","DOIUrl":null,"url":null,"abstract":"We present a 512 kB MONOS type flash memory module embedded in a microcontroller fabricated with a 0.18 /spl mu/m CMOS process. Our new memory cell structure enables the whole read path in the module to be composed of low voltage transistors that are the same as those used in the CPU core, and therefore achieves compact layout of peripheral circuits. The module achieves 34 MHz random access read operation. The measured program time and erase time for a 64 kB block were less than 4 ms and less than 11 ms, respectively. The area of the 512 kB module is 5.4 mm/sup 2/.","PeriodicalId":270304,"journal":{"name":"2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2003.1221205","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
We present a 512 kB MONOS type flash memory module embedded in a microcontroller fabricated with a 0.18 /spl mu/m CMOS process. Our new memory cell structure enables the whole read path in the module to be composed of low voltage transistors that are the same as those used in the CPU core, and therefore achieves compact layout of peripheral circuits. The module achieves 34 MHz random access read operation. The measured program time and erase time for a 64 kB block were less than 4 ms and less than 11 ms, respectively. The area of the 512 kB module is 5.4 mm/sup 2/.