Implementation of half-pel motion estimation IP core for MPEG-4 ASP@L5 texture coding

Abstract

An efficient fully pipelined parallel 1-D and 2-D mixed motion estimation array architecture for MPEG-4 ASP@L5 encoder is proposed in This work. Unlike most previously presented motion estimation processors, this design can deal with 8/spl times/ block and 16 /spl times/ 6 macroblock motion estimation with different searching ranges in full-pel and half-pel resolution. Experimental results show that it is able to estimate half-pel texture motion vectors of MPEG-4 AS Profile in ITU-R601 format in real-time at around 100MHz.