A performance comparison of PLLs for clock generation using ring oscillator VCO and LC oscillator in a digital CMOS process

Abstract

This paper dwcribes a performance comparison of two PLLs for clock generation using a ring oscillator based VCO and an LC oscillator based VCO. We fabricate two 1.6GHz PLLS in a 0.18 μm digital CMOS process and compare their performances baser! on the measurement results. We also prodiets major performances of PLLs in the futum such as jitter, power consumption and chip area, based on a qualitative evaluation in an analytic way.