Perspective on Power IC technology: From design lab to wafer fab

P. Igić, M. Elwin, P. Holland
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引用次数: 1

Abstract

A case study regarding development of a 100V Power IC technology is presented in this paper. A combination of conventional cross sectional process and device simulations combined with top down and 3D device simulations have been used to design and optimise the integration of a 100V Lateral DMOS (LDMOS) device for high side bridge applications. This combined simulation approach can streamline the device design process and gain important information about end effects which are lost from 2D cross sectional simulations. Design solutions to negate detrimental end effects are proposed and optimised by top down and 3D simulations and subsequently proven on tested silicon. Different electrical isolation schemes have also been investigated.
电源集成电路技术展望:从设计实验室到晶圆厂
本文介绍了一种100V功率集成电路技术的开发实例。将传统的横截面工艺和器件模拟与自顶向下和3D器件模拟相结合,用于设计和优化用于高侧桥应用的100V横向DMOS (LDMOS)器件的集成。这种组合仿真方法可以简化器件设计过程,并获得二维截面仿真中丢失的关于末端效应的重要信息。通过自顶向下和3D模拟,提出并优化了消除有害终端效应的设计解决方案,并随后在测试硅上进行了验证。不同的电隔离方案也进行了研究。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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