Electrical modelling of lossy on-chip multilevel interconnecting lines

Abstract

A self contained method for the electrical modelling of lossy 3-D multilevel interconnections has been developed. The method allows for the generation of a multiple coupled line model, compatible with SPICE-like CAD programs, from the interconnection line constants and parasitic coupling parameters which are computed by the so-called method of moments. The proposed method can be used for the analysis of coupled line systems with linear or nonlinear/time varying terminators, as well as for the study of the pulse propagation characteristics in high-speed ICs. Numerical results are presented for 3-D parallel and galvanically separated crossed planar lines.<>