An efficient wavelet image encoder for FPGA-based designs

Abstract

This paper presents the design of a new wavelet-based encoder suitable for fast and low-power image and video compression. The proposed circuit is based on a modified version of the No List SPIHT algorithm. When realized using a XILINX Virtex XC2V1000 device, the new encoder requires only 3.4 ms to perform lossless image compression on a 128/spl times/128 16-bit discrete wavelet transformed image. It uses 392 slices, /spl sim/15 KB of RAM memory and dissipates just 8.2 mW/MHz.