1-1 8GHz Monolithic Distributed Amplifier With Lumped And Distributed Elements

Abstract

In this paper will be presented the design technique of a monolithic distributed amplifier, designed to obtain the widest bandwidth wi th the highest gain/device and lowest area. The procedure starts with the assumption of ideal devices and theoretical constrains for their values. On a step by step optimisation process, real device models and reduced catnstrains on their values were introduced. A 3 stage amplifier with 3.75k0.5clB from 1-1 8GHz was designed, fabricated and tested. The chip total area is 2~3tnm2. Experimental and sirnulation results will be presented.