Compensated layout for automated accurate common-centroid capacitor arrays

Abstract

In this paper, a layout scheme for accurate common-centroid rectangular unit-capacitor arrays is presented with detailed explanation of the rules used to improve matching. This layout technique is combined with a common-centroid arbitrary-value capacitor placement algorithm to form an automatic capacitor array generation tool. Finally, design and measurement results of a test chip that intends to evaluate the effectiveness of this automatic array generation tool are presented. Results indicate significant improvements in