E. Batail, S. Monfray, D. Rideau, M. Szczap, N. Loubet, T. Skotnicki, C. Tabone, J. Hartmann, S. Borel, G. Rabillé, J. Damlencourt, B. Vincent, B. Previtali, L. Clavelier
{"title":"Germanium-On-Nothing (GeON): an innovative technology for ultrathin Ge film integration","authors":"E. Batail, S. Monfray, D. Rideau, M. Szczap, N. Loubet, T. Skotnicki, C. Tabone, J. Hartmann, S. Borel, G. Rabillé, J. Damlencourt, B. Vincent, B. Previtali, L. Clavelier","doi":"10.1109/ESSDERC.2007.4430975","DOIUrl":null,"url":null,"abstract":"In this paper, a novel CMOS device concept called Germanium-On-Nothing (GeON) is proposed. GeON allows integration of ultrathin Ge films on insulator on a conventional Si substrate. In particular we demonstrate the realization of 20 nm-thick Si0.06Ge0.94 films on 15 nm buried dielectric. In the second part of the paper, simulations were performed to highlight the advantages of ultrathin body Ge devices on Insulator. The resulting TCAD simulations coupled with an original quantum confinement model show that reducing the Ge thickness below 7 nm leads to enhanced electrostatic integrity compared to its Si counterparts.","PeriodicalId":103959,"journal":{"name":"ESSDERC 2007 - 37th European Solid State Device Research Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSDERC 2007 - 37th European Solid State Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDERC.2007.4430975","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
In this paper, a novel CMOS device concept called Germanium-On-Nothing (GeON) is proposed. GeON allows integration of ultrathin Ge films on insulator on a conventional Si substrate. In particular we demonstrate the realization of 20 nm-thick Si0.06Ge0.94 films on 15 nm buried dielectric. In the second part of the paper, simulations were performed to highlight the advantages of ultrathin body Ge devices on Insulator. The resulting TCAD simulations coupled with an original quantum confinement model show that reducing the Ge thickness below 7 nm leads to enhanced electrostatic integrity compared to its Si counterparts.