Reducing Large LDNMOSFET Substrate Currents by Modifying Isolation Ring Voltages

Abstract

Large substrate currents could induce the device melt in power manager integrated circuit applications. Many researches are focused on how to reduce substrate currents from process modifications. In this paper, the fundamental substrate current mechanism analyses are studied. Then, a tracing-high voltage between the device drain terminal and the device source terminal applied on the isolation ring is proposed for substrate current reductions. Engineers can apply this method for avoiding the device burned-out without the complicated process changes.