Flag Based All Digital Timing Recovery

2019 IEEE CHILEAN Conference on Electrical, Electronics Engineering, Information and Communication Technologies (CHILECON) Pub Date : 2019-11-01 DOI:10.1109/CHILECON47746.2019.8987987

Daniel Cárdenas, Germán Arévalo

引用次数: 1

Abstract

We implemented an all-digital timing recovery i.e. without a VCO, that works in case the receiver is faster or slower than the transmitter and with no need of decimation, unlike other implementations. This system takes advantage of and is suitable for parallel structures.

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基于标志的全数字定时恢复

我们实现了一个全数字定时恢复，即没有VCO，它可以在接收器比发射器更快或更慢的情况下工作，并且不需要抽取，不像其他实现。该系统利用了并行结构的优点，适用于并行结构。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2019 IEEE CHILEAN Conference on Electrical, Electronics Engineering, Information and Communication Technologies (CHILECON)

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