A 1 V operational, 20 MS/s and 57 dB of S/N, current-mode CMOS sample-and-hold IC

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) Pub Date : 2001-06-14 DOI:10.1109/VLSIC.2001.934240

Y. Sugimoto

引用次数: 3

Abstract

A 1 V operational, 20 MS/s MOS sample-and-hold IC, which is applicable to video signal processing, has been developed. The signal-to-noise ratio (SNR) reached 57 dB under the application of +200 μA of differential input signal current at a 1 MHz frequency. The fabrication process was 0.35 μm CMOS with a threshold voltage of +0.35 V for an NMOS device and -0.35 V for a PMOS device.

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工作电压为1v, s /s为20ms /s, s /N为57db，电流模式CMOS采样保持IC

研制了一种适用于视频信号处理的1v工作、20ms /s的MOS采样保持电路。当差分输入电流为+200 μA，频率为1 MHz时，信噪比达到57 dB。制作工艺为0.35 μm CMOS, NMOS器件的阈值电压为+0.35 V, PMOS器件的阈值电压为-0.35 V。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185)

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