An improved fourth-order band-pass sigma-delta modulator with a novel resonator

Xiaowei Liu, Honglin Xu, Jiajun Zhou, Song Chen, Jiang Yang
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引用次数: 4

Abstract

This paper presents an improved full differential low-voltage fourth-order Ong-band-pass sigma-delta modulator (Ong-BPSDM, proposed by Adrian K. Ong firstly) using a novel resonator based on Salo architecture. Compared with the reported Ong-BPSDM, the proposed fourth-order Ong-BPSDM utilizing a novel double-sampling and double-delay resonator which only needs one op-amp has a better performance with a lower capacitive load and lower power consumption. The performance specifications of the blocks of BPSDM are confirmed by building the behavior model of the system scheme in the environment of Simulink. The circuits are simulated through TSMC0.18μm CMOS process. The modulator achieves a peak signal to noise ratio (SNR) 85.5dB and DR 87dB in the center frequency 20MHz for a 200 KHz bandwidth. The power consumption of the circuits is as low as 27 mW with a 1.8V supply.
带新型谐振腔的改进四阶带通σ - δ调制器
本文提出了一种改进的全差分低压四阶Ong带通σ - δ调制器(Ong- bpsdm,由Adrian K. Ong首先提出),该调制器采用一种基于Salo结构的新型谐振器。与已有的Ong-BPSDM相比,本文提出的四阶Ong-BPSDM采用一种新型双采样双延时谐振腔,只需要一个运放,具有更低的容性负载和更低的功耗。通过在Simulink环境下建立系统方案的行为模型,确定了BPSDM各模块的性能指标。采用TSMC0.18μm CMOS工艺对电路进行仿真。该调制器在200 KHz带宽下,在中心频率20MHz处峰值信噪比为85.5dB, DR为87dB。电路的功耗低至27mw,电源为1.8V。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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