Sandeep Kolla, Ayesha Sk, S. Veeramachaneni, S. Mahammad
{"title":"Design and Analysis of Obfuscated Full Adders","authors":"Sandeep Kolla, Ayesha Sk, S. Veeramachaneni, S. Mahammad","doi":"10.1109/ICM52667.2021.9664955","DOIUrl":null,"url":null,"abstract":"In modern day semiconductor industry secure circuit/hardware is one of the major concern due to issues like IC piracy, Trojan insertion, IC over production and etc.,. Recently researchers has demonstrated various hardware based attacks and also expressed their concern towards the design of the obfuscated circuit. Securing the hardware circuit is one of the key concerns today. This work proposes design of the secure adders and its implementations. The objective of this work is to design minimal overhead based secure adders for secure system design. This can be achieved by encrypting the key into the hardware circuit at transistor level. The correct key ensures circuit’s correct operation, else it produces an incorrect value. The correct and incorrect operation resultant output can not be distinguished by the malicious user.","PeriodicalId":212613,"journal":{"name":"2021 International Conference on Microelectronics (ICM)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 International Conference on Microelectronics (ICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM52667.2021.9664955","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In modern day semiconductor industry secure circuit/hardware is one of the major concern due to issues like IC piracy, Trojan insertion, IC over production and etc.,. Recently researchers has demonstrated various hardware based attacks and also expressed their concern towards the design of the obfuscated circuit. Securing the hardware circuit is one of the key concerns today. This work proposes design of the secure adders and its implementations. The objective of this work is to design minimal overhead based secure adders for secure system design. This can be achieved by encrypting the key into the hardware circuit at transistor level. The correct key ensures circuit’s correct operation, else it produces an incorrect value. The correct and incorrect operation resultant output can not be distinguished by the malicious user.