A modularized speech recognition processor LSI with a highly parallel structure

Abstract

To aclualize a continuous speech recognition System with a large vocabulary, we proposed ring-my-pmessor architecture 11-21, This architecture has the two features: highly parallel DTW(Dynamie Time Warping) processing [31 capability. which is the main algorithm used to realim speech recognition. and array size flexibility. which makes it possible to determine the number of PE(hxessing Element) contained by the array processor according to vocabulwy si?.. This paper describes the PE-LSl’s architecture used to realize a high performance array processor and the VLSI implementation methodology. and discusses obtained resulu.