Modeling of SOI uniformity impact on silicon photonic grating coupler performance compared to other process variation sources

Abstract

Silicon Photonics is a unique platform for optical component integration that will provide high-data rate and cost-effective solutions for data center interconnections of 40 Gbps and beyond. High data rates and low levels of optical losses are key indicators for optical performance. Silicon on Insulator substrates are the preferred choice for silicon photonics as they allow easy manufacturing of uniformly thick waveguides for the fabrication of optical devices such as integrated 4 channel WDM transceivers [1]. Uniformity of the SOI layer is a key parameter to ensure the lowest total circuit optical loss, while a thick buried oxide guarantees a good optical confinement. The effect of typical SOI uniformity has been considered among other parameters as a factor impacting optical device performance by many research groups [2-4].