{"title":"Functional Validation of a New Network Switch Architecture Using Rapid Prototyping Techniques","authors":"B. Kahne, J. Holt","doi":"10.1109/MTV.2013.15","DOIUrl":null,"url":null,"abstract":"When developing a new architecture with a new programming model, not only must performance be taken into account, but the programming model itself must also be validated, in order to ensure that software will run correctly and with sufficient efficiency. In this paper, we describe how we applied rapid prototyping techniques to model a new network switch architecture. By concentrating on functional modeling and using a high-level description for core modeling, as well as abstract C++ models for peripherals, our model was able to track the specification, allowing studies to be performed on code density and ABI requirements, with sufficient time to be able to influence the architecture as it evolved.","PeriodicalId":129513,"journal":{"name":"2013 14th International Workshop on Microprocessor Test and Verification","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 14th International Workshop on Microprocessor Test and Verification","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MTV.2013.15","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
When developing a new architecture with a new programming model, not only must performance be taken into account, but the programming model itself must also be validated, in order to ensure that software will run correctly and with sufficient efficiency. In this paper, we describe how we applied rapid prototyping techniques to model a new network switch architecture. By concentrating on functional modeling and using a high-level description for core modeling, as well as abstract C++ models for peripherals, our model was able to track the specification, allowing studies to be performed on code density and ABI requirements, with sufficient time to be able to influence the architecture as it evolved.