A new current-mode squaring circuit with compensation for error resulting from carrier mobility reduction

Abstract

This paper presents a new current-mode squaring circuit. The design is based on MOSFETs translinear principle in strong inversion. A new compensation techniques to minimize the second order effects caused by carrier mobility reduction in short channel MOSFETs is proposed. Tanner T-spice simulation tool is used to confirm the functionality of the proposed design in 0.18μm CMOS process technology. Simulation results indicate that the maximum linearity error is 1.16 % and the power consumption is 331μW.