Efficient simulation of synthesis-oriented system level designs

Rajesh K. Gupta, S. Shukla, N. Savoiu
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引用次数: 9

Abstract

Modeling for synthesis and modeling for simulation seem to be two competing goals in the context of C++-based modeling frameworks. One of the reasons is while most hardware systems have some inherent parallelism efficiently expressing it depends on whether the target usage is synthesis or simulation. For synthesis, designs are usually described with synthesis tools in mind and are therefore partitioned according to the targeted hardware units. For simulation, runtime efficiency is critical but our previous work has shown that a synthesis-oriented description is not necessarily the most efficient, especially if using multiprocessor simulators. Multiprocessor simulation requires preemptive multithreading but most current C++-based high level system description languages use cooperative multithreading to exploit parallelism to reduce overhead. We have seen that, for synthesis-oriented models, along with adding preemptive threading we need to transform the threading structure for good simulation performance. In this paper we present an algorithm for automatically applying such transformations to C++-based hardware models, ongoing work aimed at proving the equivalence between the original and transformed model, and a 62% to 76% simulation time improvement on a dual processor simulator.
面向综合的系统级设计的高效仿真
在基于c++的建模框架中,为综合而建模和为仿真而建模似乎是两个相互竞争的目标。其中一个原因是,虽然大多数硬件系统都有一些固有的并行性,但它的有效表达取决于目标用途是综合还是模拟。对于综合,设计通常是用综合工具描述的,因此根据目标硬件单元进行划分。对于仿真,运行时效率是至关重要的,但我们之前的工作表明,面向合成的描述不一定是最有效的,特别是如果使用多处理器模拟器。多处理器仿真需要抢占式多线程,但目前大多数基于c++的高级系统描述语言都使用协作式多线程来利用并行性来减少开销。我们已经看到,对于面向综合的模型,除了添加抢占式线程外,我们还需要转换线程结构以获得良好的仿真性能。在本文中,我们提出了一种自动将这种转换应用于基于c++的硬件模型的算法,正在进行的工作旨在证明原始模型和转换模型之间的等价性,并在双处理器模拟器上将仿真时间提高62%至76%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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