A low-power W-CDMA demodulator using specially-designed micro-DSPs

Abstract

This paper presents the architecture of a demodulator developed for W-CDMA digital baseband processing. The demodulator features micro-DSPs specially designed for it and a variety of power-lowering and area-saving techniques such as detailed clock control, reduction of unnecessary signal transition and data compression. These features give the demodulator much lower power consumption and smaller size than a conventional one.