A charge recycling TCAM with Checkerboard Array arrangement for low power applications

Abstract

A low power and low noise Ternary Content Addressable Memory (TCAM) architecture is proposed. A TCAM is a powerful engine for search and sort processing, but it has serious power consumption and power line noise problems. To solve these problems, we have developed a charge recycling scheme for match lines, search lines and a Checkerboard Array arrangement. By using these technologies, TCAM power and power line noise can be reduced by 50 % when compared with conventional designs.