A packet-memory-integrated 44 Gb/s switching processor with a 10 Gb port and 12 Gb ports

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) Pub Date : 2002-08-07 DOI:10.1109/ISSCC.2002.992096

M. Lau, S. Shieh, Pei-Feng Wang, B. Smith, Min-Shueh Yuan, D. Lee, J. Gaba, J. Chao, B. Shung, C. Shih

引用次数: 7

Abstract

A 44 Gb/s switching processor chip has 1 MB embedded packet memory. With a 10 Gb and 12 1 Gb ports, this chip is useful for LAN/WAN bridging applications. Wire-speed switching performance is demonstrated using a shared buffer switching architecture. This 0.18 μm CMOS processor integrates a 10 Gb port with an XGMII interface.

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一个包内存集成的44gb /s交换处理器，带有10gb端口和12gb端口

一个44gb /s的交换处理器芯片具有1mb的内嵌包内存。该芯片具有10gb和12个1gb端口，可用于LAN/WAN桥接应用程序。使用共享缓冲交换架构演示了线速交换性能。这款0.18 μm CMOS处理器集成了10gb端口和XGMII接口。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)

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