Energy Efficient UART Design Using Virtex-4, Virtex-5 and Virtex-6 FPGA

Abstract

We analyzed the deviation of various power of chips that are clustered on Universal Asynchronous Receiver Transmitter (UART), for example IOs power, leakage power and total power by varying the voltage supply. We performed our experiment and analyzed how the variation in voltage influences the power of UART chips. We used three different FPGA technology that are Virtex-4, Virtex-5, and Virtex-6 to perform our experiment and analyzed that Virtex-4 is most power efficient.