Power dissipation reductions with genetic algorithms

Abstract

Two cases of power dissipation reduction with post-fabrication adjustment using genetic algorithms is introduced in this paper. The first is a 1GHz ALU implementation, where power consumption has been reduced by 54% through clock-timing adjustment. The second case is the IF (intermediate frequency) filter analog LSI used in cellular phones, where the reduction in power dissipation is realized by circuit parameter adjustment. The IF filter has been widely used in commercial cellular phones since 2001.