Automated Integration of Dynamic Power Management into FPGA-Based Design

Abstract

A low power or energy efficient hardware operation is nowadays gaining attention. It is especially true for battery-operated or energy-harvesting devices, such as most of the Internet of Things end nodes. For specific applications with rather limited market, the FPGAs are very good alternative. However, evolution of these devices is focused on high-level programming, giving application designers space to focus on application function rather than to be concerned about its low-level implementation on FPGA device – it is handled by automation tools. Thus, new FPGA-application designers are nowadays not very familiar with hardware aspects and it is difficult for them to apply power-reduction techniques in order to create an energy-efficient system. This paper is focused on automation of power-management integration into the FPGA-application design based on abstract specification, which is easy-to-use even for unfamiliar designers. It simplifies and speeds-up the low-power and energy-efficient FPGA-application design process. Moreover, the automation prevents many human-errors and thus it also alleviates the verification process. Experimental results indicate that the proposed power-management scheme is working correctly and it can be automatically generated.