A reduction method of harmonic currents in power systems generated by switching regulators

Conference Record of the 1993 IEEE Industry Applications Conference Twenty-Eighth IAS Annual Meeting Pub Date : 1993-10-02 DOI:10.1109/IAS.1993.299238

K. Matsui, I. Yamamoto, K. Tsuboi, K. Iwata, S. Muto, M. Watanabe, F. Ueda

引用次数: 4

Abstract

A forward power converter with reduced harmonics for the input supply current is proposed. In this converter, the input capacitance is reduced, so that lower-order harmonics such as the fifth and the seventh can be largely reduced by about 20% to 40%. However, the DC link voltage ripple is increased in the proposed circuit. Such characteristics have been improved by a ripple compensation circuit consisting of the feedforward circuit. One can also obtain a noticeable harmonic elimination effect for the use of parallel connection between the proposed circuits and the conventional ones.<>

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电力系统中由开关调节器产生的谐波电流的减小方法

提出了一种对输入电源电流进行谐波降低的正向功率变换器。在该变换器中，输入电容被减小，因此低阶谐波，如第五次和第七次谐波可以大大降低约20%至40%。然而，该电路增加了直流链路电压纹波。采用由前馈电路组成的纹波补偿电路改善了这一特性。在所提出的电路和传统电路之间采用并联连接，还可以获得明显的谐波消除效果。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Conference Record of the 1993 IEEE Industry Applications Conference Twenty-Eighth IAS Annual Meeting

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