Y. Kanno, H. Mizuno, N. Oodaira, Y. Yasu, K. Yanagisawa
{"title":"/spl mu/I/O architecture for 0.13-/spl mu/m wide-voltage-range system-on-a-package (SoP) designs","authors":"Y. Kanno, H. Mizuno, N. Oodaira, Y. Yasu, K. Yanagisawa","doi":"10.1109/VLSIC.2002.1015075","DOIUrl":null,"url":null,"abstract":"To provide low-cost system solutions together with a 0.13-/spl mu/m dual-t/sub ox/ CMOS and multi-chip package (MCP) technologies, a new, so-called /spl mu/I/O architecture was developed. The /spl mu/I/O provides a common interface throughout the module and, thus, enables high design reusability and hierarchical I/O design for MCPs. The /spl mu/I/O includes a signal-level converter for integrating wide-voltage-range (0.75-1.3 or 1.5-3.6 V) circuit blocks, and a signal wall function for turning off each block independently - without invalid signal transmission - by using an internal power switch.","PeriodicalId":162493,"journal":{"name":"2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2002.1015075","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13
Abstract
To provide low-cost system solutions together with a 0.13-/spl mu/m dual-t/sub ox/ CMOS and multi-chip package (MCP) technologies, a new, so-called /spl mu/I/O architecture was developed. The /spl mu/I/O provides a common interface throughout the module and, thus, enables high design reusability and hierarchical I/O design for MCPs. The /spl mu/I/O includes a signal-level converter for integrating wide-voltage-range (0.75-1.3 or 1.5-3.6 V) circuit blocks, and a signal wall function for turning off each block independently - without invalid signal transmission - by using an internal power switch.