Energy Reduction in SRAM using Dynamic Voltage and Frequency Management

I. MohammedShareef, P. Nair, B. Amrutur
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引用次数: 2

Abstract

This paper describes a dynamic voltage frequency control scheme for a 256 X 64 SRAM block for reducing the energy in active mode and stand-by mode. The DVFM control system monitors the external clock and changes the supply voltage and the body bias so as to achieve a significant reduction in energy. The behavioral model of the proposed DVFM control system algorithm is described and simulated in HDL using delay and energy parameters obtained through SPICE simulation. The frequency range dictated by an external controller is 100 MHz to I GHz. The supply voltage of the complete memory system is varied in steps of 50 mV over the range of 500 mV to IV. The threshold voltage range of operation is plusmn100 mV around the nominal value, achieving 83.4% energy reduction in the active mode and 86.7% in the stand-by mode. This paper also proposes a energy replica that is used in the energy monitor subsystem of the DVFM system.
使用动态电压和频率管理降低SRAM的能量
本文介绍了一种用于256 × 64 SRAM块的动态电压频率控制方案,以减少主动模式和待机模式下的能量。DVFM控制系统监控外部时钟,改变电源电压和体偏置,从而实现能量的显著降低。利用SPICE仿真得到的时延和能量参数,描述了所提出的DVFM控制系统算法的行为模型,并用HDL语言进行了仿真。外部控制器控制的频率范围为100mhz ~ 1ghz。整个存储系统的电源电压在500 mV到IV的范围内以50 mV的阶跃变化。工作的阈值电压范围在标称值附近为±100 mV,在主动模式下节能83.4%,在待机模式下节能86.7%。本文还提出了一种用于DVFM系统能量监测子系统的能量副本。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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