A new bit-serial architecture of rank-order filter

Takuya Yamamoto, V. Moshnyaga
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引用次数: 4

Abstract

This paper presents a new architecture of rank-order median filter. The architecture processes all window samples in parallel in the bit-serial manner. Unlike related architectures, it neither sorts/swaps nor modifies the window samples and requires less hardware resources. To process k samples, each of N-bits in size, the architecture uses N shift registers of k bits each and a simple logic. It produces the result in N+1 clock cycles independently to the window size.
一种新的秩序滤波器位串行结构
提出了一种新的秩阶中值滤波器结构。该体系结构以位串行方式并行处理所有窗口样本。与相关的体系结构不同,它既不排序/交换也不修改窗口样本,并且需要更少的硬件资源。为了处理k个样本,每个样本的大小为N位,该架构使用N个移位寄存器,每个移位寄存器为k位,并使用简单的逻辑。它以N+1个时钟周期产生结果,与窗口大小无关。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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